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Design Automation Engineer - JR0173026

Now is an exciting time for Intel’s Design Enablement Group. This position is within the Design Enablement (DE) organization of Technology Development (TD). At Intel, Design Enablement (DE) is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable design teams to get to market faster with leadership products on cutting-edge technologies.
 
As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies, and drive PDKs towards industry-standard methods and ease of use for the end customers.

About the role:
- The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors, and product design teams to develop and deliver high-quality technology collaterals, models, and enablement of EDA tools.
- As PDK Validation Engineer you will support validation and release of PDK custom layout collaterals to Intel internal design and IFS customers.
- Development of automated QA flows
- Writing efficient code in scripting languages to automatically generate, analyze large amounts of data to improve the overall quality of the custom tech library released in the PDK for leading technology nodes.
- Work closely with the PDK development team and EDA suppliers to implement robust QA checks and resolve tool and collateral issues prior to PDK releases.
 
Important behavior traits we look for:
- Written and verbal communication skills
- Possess teamwork and problem-solving

This is an entry-level position and will be compensated accordingly.

Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

The requisition you will see with the provided link has the skillset of different positions under the same opening. Therefore, several hiring managers will have the opportunity to review all the candidates, this way you will have the opportunity to showcase your resume to more managers at the same time, a great chance to apply and get matched.

Minimum qualifications:
Master's in Electrical Engineering, Computer Science, or Computer Engineering
6+ months experience in following areas:
- Cadence Virtuoso
- Auto-routing
- Perl or Python or Ruby or TCL
- UNIX/Linux
 
Preferred:
- External EDA custom layout tools is a plus
- Parameterized cells (Pcell)